Samsung Electronics (005930.KS), the world's largest memory-chip maker, showed the first physical mockup of its next-generation HBM5 high-bandwidth memory at Computex 2026 in Taipei on June 2, using the Taiwanese computing trade show to argue it is racing to the front of the AI-memory roadmap rather than chasing it. (Yonhap; ChosunBiz; The Korea Herald)
The immediate question for anyone watching the memory complex is narrower than the launch fanfare: does a mockup of a part that is years from volume tell you anything about whether Samsung can close the gap with SK hynix, Korea's other large chipmaker and the current HBM market leader? The answer lies less in the HBM5 model itself than in the production-stage parts Samsung displayed alongside it.
What was actually shown
HBM — high-bandwidth memory, the stacked DRAM that feeds Nvidia (the dominant US AI-accelerator designer) and rival chips — is the most profitable corner of the memory market, and the generation race is where suppliers win or lose sockets. At the booth, Song Jae-hyuk, president and chief technology officer of Samsung's Device Solutions (chip) division, unveiled the HBM5 mockup and a thermal structure called HPB (Heat Path Block), which adds a dedicated heat-transfer route between stacked dies to lower thermal resistance. Song described it as "a kind of chimney" for dissipating heat in dense AI systems, and said Samsung has already implemented and verified HPB on its HBM4E-based products before applying it from HBM5 onward. (ChosunBiz; The Korea Herald)
Samsung also said HBM5 will use a base die built on its own 2-nanometer foundry process, combining its memory and logic operations — a step up from the 4-nanometer base die in HBM4E. (ChosunBiz; The Korea Herald)
The more concrete signal sat next to the mockup: HBM4E wafers and chipsets that Samsung says it began shipping as industry-first samples in late May. According to ChosunBiz and The Korea Herald, HBM4E pairs Samsung's leading-edge 1c DRAM core die with a 4-nanometer foundry base die, runs at up to 16 gigabits per second per pin, and delivers up to 3.6 terabytes per second of bandwidth per stack.
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The sizing explains the urgency. UK-based researcher Omdia projects the global HBM market will more than triple from $58.9 billion in 2026 to $198.3 billion in 2029 as AI-server demand compounds. (The Korea Herald, citing Omdia) Whoever holds the top sockets in that ramp captures the bulk of memory-industry profit.
Samsung does not hold them today. Per data from Counterpoint Research cited in market coverage, SK hynix held roughly 53% of the HBM market in the third quarter of 2025 against Samsung's about 35%, after SK hynix won the bulk of Nvidia's earlier HBM3E business. That gap is the backdrop against which Samsung is now claiming a roughly six-month qualification lead on HBM4E. Showing a sample-stage HBM4E part and an HBM5 mockup at the same booth is Samsung's way of arguing the order has not yet been settled for the generations that matter most.
The data point to watch
The mockup will not move revenue; the allocation decisions on Nvidia's next platform will. TrendForce reporting indicates Nvidia is expected to route roughly two-thirds of its HBM4 demand for the Vera Rubin platform to SK hynix, with Samsung positioned as the primary alternative supplier targeting early HBM4 delivery. The signal to watch is whether Samsung's HBM4E sample lead converts into a larger HBM4-generation allocation as 2026 contracts firm up — the first hard test of whether the Computex messaging reflects a real share shift or a roadmap that is still mostly on paper.
This article is for informational purposes only and does not constitute investment advice. Figures are sourced as cited and were accurate as of publication; readers should verify against primary disclosures before making decisions.
